ASIC Design Engineer---High Speed Network Processor
Networking Chip Division is actively looking for senior ASIC Designers with a firm design background developing advanced RTL Code for a Multi Million Gate High Speed Asic.
Job Description:
You will be designing complex high speed ASICs for company's high performance products.
This position requires 10 years of ASIC experience with 7+ years of Networking ASIC experience.
You should have been through the entire ASIC design cycle (Verilog, Synopsys Design Compiler, Prime Time, BIST/SCAN insertion, RTL/gate level verification, Back End ASIC or COT model).
Should be proficient in RTL coding, synthesis, and microarchitecture design.
Must be hands-on and have leadership experience. BSEE required.