Job Description:

Senior Mixed-Signal Design Engineer

Location: Orange County, California

MUST HAVES:

• I am looking for a designer who will perform transistor level design of high speed logic for our ADC’s, DAC’s, SerDes and clock buffers using spice.  Since this is the logic side of things, I am calling this position a “mixed signal” engineer as opposed to a more traditional analog design engineer.
• Someone who designed standard cell logic cells at the transistor level is preferred.  Experience designing SerDes and PLL’s is a plus.

DUTIES:

• Design and verify analog and mixed signal transistor level high speed, low jitter circuits such as SerDes, PLL’s, CDR’s, Serializers, Deserializers, and critical clock circuits.
• Design full custom high speed standard cell digital logic blocks for above mentioned circuits.  Concentration will be on high speed logic design.

REQUIREMENTS:

• Knowledge of high speed serial interfaces (PCI-E, SATA, HDMI, Xaui, Xfi).
• Experience designing high speed logic circuits using Spice.
• Experience designing logic portion of high speed ADC’s, DAC’s, FIFO’s and Serializer/Deserializers.
• Hands on experience designing PLL’s, Transmit and Receive blocks of serial transceivers.
• Experience using SPICE simulators (Hspice/Smartspice, Spectre, Nanosim, Hsim).
• Proficient in Verilog/VerilogA
• In depth experience with analog layout techniques and ability to work closely with layout team.
• Experience using schematic capture tools (Virtuoso preferred) and extraction tools.
• Experience designing I/O’s (SSTL, HSTL, LVDS, CML)
• 10 years of design experience/MSEE preferred.
• Ability to work on multiple projects simultaneously.