Principal/Senior Analog Design Engineer
| Job
code: |
6041 |
| Job Category: |
Analog IC |
| City: |
Santa Clara |
Job Description:
Position: Principal/Senior Analog Design Engineer
Responsibility:
• Responsible for analog circuit design, verification, layout and testing of a variety of blocks including very high speed, high linearity ADC, DAC and PLL
• Based on experience might be required to lead the design of a sub block and supervise a team of engineers
• Interact with packaging, ESD and test development teams
Qualifications:
• BSEE/MSEE with 10+ years experience in analog circuit design, Ph.D. a plus
• Comprehensive understanding of the principles of large-signal transistor level analog circuit design, particularly in CMOS
• Expert in state of the art tools and related work-flows commonly used for sub micron mixed signal design including experience with Matlab, Cadence design environment, verilogA, and mixed mode simulations.
• Direct design experience in at least two of the following areas: High speed ADCs, DACs, switched capacitor filters, Line drivers, Programmable gain amplifiers, high performance Phase locked loops and power regulators
• Track record in successful complex analog silicon implementations involving one or more of the above areas.
• Excellent communication skills
• Design of Ethernet PHYs (10/100 or Gigabit) or DSL AFEs a plus
• Project leadership experience on successful complex analog chips a plus.
• RF experience at frequencies up to 1 GHz a plus
|
|