Detailed Job Descriptions
Senior Architect
Responsibilities:
The Senior Architect reports directly to the Director of ASIC Development and will work closely with the Director to help specify and design the next generation Kilocore fabric; wrapper; and SoC, including memory/DMA subsystems, I/O and interface subsystems, embedded processors and buses. Specific responsibilities include:
Works with Marketing, Field Applications, and others as needed to help define market and customer requirements for the Kilocore architecture.
Performs high level architecture modeling to analyze performance and fine tune proposed architectures.
Responsible for the overall internal Kilocore architecture and detailed requirements specification for all underlying blocks.
Works closely with SoC engineers to specify Kilcore SoC architecture and interface between wrapper and rest of SoC.
Works closely with the design teams in developing the micro-architecture specifications, ensuring the proposed implementation meets all requirements.
Develops models and test benches for architecture.
Participates in verilog coding, simulation, and review of critical modules as necessary.
Supports physical design activities, including specification of IP blocks and vendor evaluations; making floorplan and area trade-offs.
Supports technical writers with documentation, especially for the Kilocore specification.
Supports the Field Application Engineers with the development of application notes, the development of reference designs and in general with any technical questions that may arise from their interaction with customers.
Qualifications:
Minimum BS EE/CS required, MS/ PhD preferred, plus 10 or more years of relevant industry experience.
Experience architecting at least four successful ASIC/SoC designs, at least two in 90nm or 130nm technologies. Experience with SoCs including complex interface IP, embedded microprocessors, memories, and custom logic required. Experience with graphics/media processors, reconfigurable processors, or microprocessors desirable.
In-depth knowledge of CMOS IC design and ability to analyze architectural choices and make trade-offs as needed to arrive at the most efficient solutions.
Hands on experience and expertise required in chip architecture modeling, debugging, and analysis.
Very good working knowledge of relevant IC design tools
Good C/C++/SystemC programming skills; capable of developing software models for architecture.
Good technical understanding of impact of architecture on software and interaction between software and hardware is highly desirable.
Flexible, creative, and able to perform high quality work independently with minimal supervision.
Team player with excellent written and verbal communications skills.
Must have good project management and leadership skills.