Job Description:

LEAD VERIFICATION ENGINEER

Responsibilities:

• Architect the verification environment and methodology for wireless ASICs
• Design and implement effective and efficient block-level, cluster-level and chip-level test benches
• Manage verification status and progress
• Drive the company towards cutting edge verification techniques
• Evaluate EDA tools to improve productivity

Minimum Requirements:

• BS in Electrical Engineering or Computer Science. MS preferred
• Minimum of 5 years experience in complex ASIC verification
• Must be strong in C, Verilog, Perl and Vera or Specman ‘e’
• Worked with multiple verification development cycles
• Demonstrate strong understanding of verification methodologies
• Must have some lead or management experience
• Must possess excellent communication skills and the ability to work well as part of a team
• Motivated and self starter

Desired Qualifications:

• Experience with SoCs, ARM microprocessors and AMBA bus architecture
• Knowledge of DSP algorithms
• Knowledge of wireless protocols like 802.11 and WiMedia
• Experience with hardware/software co-verification
• Working knowledge of wired protocols like USB and PCI Express
• Experience with formal verification techniques (equivalence checking and property checking)
• Experience with system verilog assertions
• Post-silicon validation experience